Recent submissions

Comment · 1 month ago
Comment · 5 months ago
Current benchmarks have ceilings, usually 100%. This benchmark aims to be a long lasting, high correlation with the ability to solve real world problems and follow complex instructions, and unbounded (meaning it can always go higher).
Comment · 6 months ago
Awesome! Let me know if it works for your propose. If not, raise a issue on github and lets work together.
Comment · 6 months ago
His claims are indeed correct; Yes, you got my point tks!; AND the loop produced architecture gains that are not exclusive to the GoWin FPGA (CoreMark/Mhz is higher than VexRiscV)
Comment · 6 months ago
Tks! Did you apply it to hardware design or to another field?
Comment · 6 months ago
Whats your take on it? "If I read it, what point should I pay attention to?", I guess is what I'm trying to say
Comment · 6 months ago
"Not at all, completely novel idea. What made you thought of such thing?" hahaha
Comment · 6 months ago
Yeah, you are totally right. Its a work in progress, and the post was written by an LLM - Im trying to improve on it (dash pun intended).

Regarding the benchmark overfitting, absolutely, it's pretty much overfitted. This CPU will only be as good as it benchmark. If I have the time I will try to get some applications and optimize for those.

Comment · 6 months ago
I genuinely laughed reading the first words. Yeah, its hard to be novel
Comment · 6 months ago
For sure! The hypothesis generation gotta be improved. Your take on the "least likely" is interesting. In the beginning of the repo I was having problems with "hypothesis convergence", your idea may be a nice way to introduce the much needed variability
Comment · 6 months ago
Is slop verifiable? If so we can throw it in the loop... The point is that this loop can be pointed at any verifiable work. Yeah you are seeing it raw, the verifier is the principle you talked about. Yes it was fully AI generated, It will be refined

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