rajesh-s
Joined 7 years ago
Karma
670
Submissions
86
Member since
Apr 2
Recent submissions
Comment · 4 years ago
Off topic but what tool did you use to create those cache hierarchy diagrams?
Comment · 5 years ago
Thanks for pointing that out!
Comment · 5 years ago
Right! Section 1.3 of this publication discusses possible mitigations for the row hammer problem and where ECC fits in
Comment · 5 years ago
Good point on the need for awareness!
The industry has convinced the average user of consumer hardware that PPA (Power,Performance,Area) is all that needs to get better with generational improvements. Hoping that the concerning aspects of security and reliability that have come to light in the recent past changes this.
Comment · 5 years ago
A whitepaper on DDR4 ECC by Micron that goes over some of the implementation challenges
https://media-www.micron.com/-/media/client/global/documents...
Comment · 5 years ago
I thought ASML manufacturing was in Connecticut, USA? I heard this from Ian Cutress on his channel https://youtu.be/JyocuFlQmTc
Hey there! I'm a Computer Engineer interested in Computer Architecture, Systems and Economics.
Twitter: @rajesh_s_
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