rachitnigam
Joined 9 years ago
Joined 9 years ago
HLS-like languages are an input to Calyx. For example, we're currently building a Vivado alternative using Calyx and the frontend there does the pipelining for us. Calyx then goes in and performs a bunch of other optimizations.
A big edge we have is that Calyx supports both statically-scheduled circuits (where the latencies of things are known) and dynamically-scheduled circuits (where latency is not known). Because of this, we have been able to do optimizations in this new flow that take advantage of both.
ASICs require a lot more work by either packaging on the same chip as a processor or building IO interfaces for their own package.
The Google VCU paper explicitly mentions using such tools made them faster. All of these is enabled by people looking at problems with a fresh perspective
What platform/browser has this problem?
"Developing Hardware is a solved problem"
For which audience specifically? Maybe if you consider giant teams at large corps pouring in millions. Is it a solved problem for hobbyists, students, people who're just curious? Most people who're curious about software can go play with it in 15 mins. For hardware, it's more like months.
"If you need pseudo-DSL ..."
Weirdly gatekeepy. Why should hardware be only used by experts? There's lot you could've said about it being hard to optimize hardware well (which is challenging with HDLs too) but instead choose this argument.
"You cannot abstract away this engineering task" The goal of research is to try to do things differently. We already know how to build hardware using HDLs, with waterfall models and giant teams. We want to figure out if there are better ways to do it.
The VLSI revolution wouldn't have happened if randos on the internet kept complaining about how "we already know how to do full custom design" and "you cannot abstract physics". We did before, and it changed the world. Let's have some optimism.
The premise of Calyx is you're generating hardware designs from high-level code which has a lot more structure than arbitrary HDL code and the compiler will use that extra structure to automatically do optimizations that cannot be done over arbitrary HDL code.