netr0ute

> G++ picks space over time

By definition, that's zero-overhead because Ultrassembler doesn't care about space.

Problem is, there are a lot of RISC-V instruction way longer than that (like th.vslide1down.vx) so hashing is going to be slow.

I thought about hashing, but found that hashing would be enormously slow to compute compared to a perfectly crafted tree.

Furus are "fake gurus." It comes from the Fintwit space where "furus" share their +1000% option trades as if they're geniuses in order to get you to sign up for their expensive Substack.

> LLVM's C++ API

I think I read something about this but couldn't figure out how to use it because the documentation is horrible. So, I found it easier to implement my own, and as it turns out, there are a few HORRIBLE bugs in the LLVM assembler (from cross reference testing) probably because nobody is using the C++ API.

> There are plenty of cppcon presentations [1] about exceptions, performance, caveats, blah blah.

I don't have enough time to watch these kinds of presentations.

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Feel free to ask me any questions to break the radio silence!

I don't remember this being the case, you could reuse your old MC purchase when they made the transition over.

The only thing I don't like about this is the focus on x86 assembly, which is a sinking ship because RISC-V is coming to eat its lunch, FAST.

This is basically irrelevant now that better ISAs like RISC-V have a fixed instruction length (2 or 4 bytes) so the fancy algorithm here isn't necessary.

> Qobuz removed a range of releases a couple months ago at short notice, including from users' accounts.

What was the deal with this?

Losing muscle

The Milk-V Pioneer has 64 out of order cores and supports 128GB of ECC memory!

Missing RISC-V