wrhn

Recent submissions

Comment · 19 days ago
The Intel D270 ([1]) has similar silicon size to an AMD Radeon R9700 ([2]) and the AMD Radeon XT 9070 ([3]), and about twice the matrix performance. So the price is mainly for the memory. Assuming "normal prices", e.g. 600 USD for 128GB, 2250 USD for 480GB, and the GPU chip itself being 600 USD if produced in enough volume, including industrial profit, its "normal price" could be less than 3000 USD. I.e., it is a slow chip with lots of RAM for covering the case of having many resident models, not for running very big models, which is a very interesting use case for AI hobbyists, and likely also for some use cases in the data centers.

[1] https://www.techpowerup.com/gpu-specs/d270.c4452

[2] https://www.techpowerup.com/gpu-specs/radeon-ai-pro-r9700.c4...

[3] https://www.techpowerup.com/gpu-specs/radeon-rx-9070-xt.c422...

Comment · 1 month ago
Is it 100% deterministic?
Comment · 1 month ago
New post by @nand2mario. This is the continuation of his work in his z486 FPGA core ([1]), now adding the implementation of the original Voodoo Graphics GPU. In addition to the linked blog post, it is also published a video ([2]), and a SD image for testing ([3]) with the Xilinx KV260 dev kit, as this time the FPGA used in the MiSTer FPGA project is not enough for fitting the CPU core and the GPU.

[1] https://news.ycombinator.com/item?id=49308269

[2] https://x.com/nand2mario/status/2096133116066992568

[3] https://x.com/nand2mario/status/2096454368929485184

Comment · 2 months ago
Accurate or not, there are many risks other than those that could bring AI companies value to 0. E.g., systems not requiring passing over all the data continuously, but in small regions running at L2-L3 cache memory speed. Once someone figures out that, the need for high bandwidth memory would end.
Comment · 2 months ago
Games, very few, if any. But software in general, quite a lot.
Comment · 2 months ago
This is the closer we have for having a full 32-bit x86 system with FPU. Even with the lower precision in the x87 FPU by using the FPGA DSP blocks, eventually having a "486DX" (i486 instruction set + FPU) would enable running a massive amount of PC software (1980..2000's). Taking his z386 core (based in the i386 microcode) and adding 486-class optimizations, including a simplified dual I/D L1 cache, vs the unified but more complex L1 cache in i486's, really is a beautiful and imaginative approach.
Comment · 3 months ago
8K decoding needs HW acceleration, unless having 8-16 cores with AVX-512.
Comment · 3 months ago
1) open-weights

2) critical mass

3) de-facto monopoly

4) closed-weights on frontier models

5) profit

Comment · 3 months ago
Thank you very much! Is the SSFv2 mapper supporting memory writes in the MiSTer FPGA, too? (Megadrive and/or 32x cores). Also, now that there's a SH3 core already available ([1] for replicating the Cave CV1000 system), it could be mind blowing having a system with 512MB of RAM on a SH3 at 100MHz running Linux.

[1] https://github.com/ika-musume/HS3

Comment · 4 months ago
They may consider rewriting their web-based apps into native apps using IA.
Comment · 5 months ago
https://archive.is/RsXYO
Comment · 6 months ago
Microsoft degrading user experience plus lower price on Mac computers it maybe their downfall. E.g., removing local accounts, unwanted advertising, arbitrary decisions (forced TPM requirement), etc.
Comment · 7 months ago
"All your Copilot are belong to us"
Comment · 7 months ago
Wasn't their target to replace humans with AI? Why is that not applicable to their business?

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