dvas
Joined 3 years ago
Joined 3 years ago
In my flow, I use a hybrid Zettelkasten-based approach to linking notes. vscode, zettlr, logseq, obsidian all render correctly. I am happy to see more tools which exhibit more of this "bring your own data" mantra.
Ref:
[0] Optimized C library for EC operations on curve secp256k1
What works is a good plain old rss.
Delivered to my client of choice, via gui or cli. Skipping ads and clickbait articles to save me time.
With a wave of generated content flooding some automated systems, the best curation will be done by yourself by finding reliable sources to subscribe to.
Many times, stress is created artificially. It hurts our performance and deteriorates our ability to think.
Encountered numerous situations where work was "urgent" and would likely land a contract or sales for the company, and everyone would be a superstar if they delivered this "crunch".
After 2 months of pulling all-nighters and sleeping for 3/4 hours, we deliver the project ahead of time. Apathy begins to set in after management/decision makers keep on giving these gifts we call "crunches".
To help the company and go the extra mile is something most of us have done in the past and will possibly do in the future. However, it's like the story of the boy who cried wolf, if everything is urgent and every task is to be done NOW, then there are bigger issues at play.
Like everything in life, there is usually a limit/budget of money, time and effort. By abusing these limits and tolerances, people will lose respect for the people crying wolf and will put less effort into their work.
PCIe 1.0 & PCIe 2.0:
Encoding: 8b/10b
PCIe 2.0 -> PCIe 3.0 transition:
Encoding changed from 8b/10b to 128b/130b, reducing bandwidth overhead from 20% to 1.54. Changes here in the actual PCB material to allow for higher frequencies. Like changing away from PCB material like FR-4 to something else [2].
PCIe 3.0, PCIe 4.0, PCIe 5.0:
Encoding: 128b/130b
There is plenty to dive deep on, things like:
- PCB Material for high-frequency signals (FR4 vs others?)
- Signal integrity
- Link Equalization
- Link Negotiation
Then decide which layer of PCIe to look at:
- Physical
- Data / Transmission
- Link Layer
- Transaction
A good place to read more is from the PCI-SIG FAQ section for each generation spec that explains how they managed to change the baud rate as you mentioned.
PCI-SIG, community responsible for developing and maintaining the standardized approach to peripheral component I/O data transfers.
PCIe 1.0 : https://pcisig.com/faq?field_category_value%5B%5D=pci_expres...
PCIe 2.0 : https://pcisig.com/faq?field_category_value%5B%5D=pci_expres...
PCIe 3.0 : https://pcisig.com/faq?field_category_value%5B%5D=pci_expres...
PCIe 4.0 : https://pcisig.com/faq?field_category_value%5B%5D=pci_expres...
PCIe 5.0 : https://pcisig.com/faq?field_category_value%5B%5D=pci_expres...
PCIe 6.0 : https://pcisig.com/faq?field_category_value%5B%5D=pci_expres...
PCIe 7.0 : https://pcisig.com/faq?field_category_value%5B%5D=pci_expres...
[0] Optimizing PCIe High-Speed Signal Transmission — Dynamic Link Equalization https://www.graniteriverlabs.com/en-us/technical-blog/pcie-d...
[1] PCIe Link Training Overview, Texas Instruments
[2] PCIe Layout and Signal Routing https://electronics.stackexchange.com/questions/327902/pcie-...
Things like packet encoding etc. Then a quick look at the signalling change of NRZ vs PAM4 in later generations.
Gen1 -> Gen5 used NRZ, PAM4 is used in PCIe6.0.
[0] Understanding Bandwidth: Back to Basics, Richard Solomon, 2016: https://www.synopsys.com/blogs/chip-design/pcie-gen1-speed-b...
Some time back I had a peek at AstraZeneca's GitHub [0] and got me curious. I know in genomics they try to use custom hardware to accelerate the process using FPGAs and others [1].
Curious if anyone can shed light on knowledge graph use at scale is being accelerated.
[0] AstraZeneca; Awesome Drug Discovery Knowledge Graphs https://github.com/AstraZeneca/awesome-drug-discovery-knowle...
[1] Gene sequencing accelerates with custom hardware https://www.mewburn.com/news-insights/gene-sequencing-accele...
[0] Multithreaded Python without the GIL https://docs.google.com/document/d/18CXhDb1ygxg-YXNBJNzfzZsD...
[1] Github repo https://github.com/colesbury/nogil
[0] FinGPT: Open-Source Financial Large Language Models https://github.com/AI4Finance-Foundation/FinGPT
[1] Zipline is a Pythonic algorithmic trading library https://github.com/quantopian/zipline
For Cortex-A8 from [4] and the others you have linked, It makes sense to me now regarding the instruction passing data between registers, filling out the pipeline and then stalling.
Will have a peek at ARMv8/ARMv9 arch's and see what they did there regarding SVE/SVE2.
Some of the buckets:
* The builders, don't care how they get the result.
* The crafters, those who care how they get to the results (vim vs emacs), and folks who enjoy looking at tiny tiny details deep in the stack.
* The get-it-done people, using standard IDE tools, stick with them, and it's a strict 9-5.
...
And many with types, and subtypes of each ^^.
In my opinion, many people have a passion for making computers to do cool things. Along the way, some of us have fallen into the mentality of using a particular tool or way of doing things and get stuck in our ways.
I think it's another tool that you must know how to utilize and utilize in a way that does not atrophy your skills in the long run. I personally use it for learning and allowing me to get an in on a knowledge topic which I can then pull on and verify that the information is correct.