davidlt

It's the same pre-training, they are just adding more (+ better) SFT, RL, etc. (post-training). Model internal knowledge cut-off is still the same.

It seems we are doing pre-training every 6 months, and post-training every 4-8 weeks now.

I just wanted to emphasize this. Harness is a big part of how things perform thus usually it's harness + model co-design that's important.

I am really surprised with RNDA3 support. I have never seen so many issue with iGPU (APU). It started with VP9 decoder issue (e.g. just playing videos on YouTube was enough to trigger it), but that got fixed after a very long time (required a new firmware). Multiple constant [different] crashes, but you can workaround most of them by adding amdgpu.sg_display=0 to your bootargs. It's already listed in Arch Linux wiki, Gentoo wiki, etc.

Again, I was surprised by the number of firmware and driver issues since RNDA1/2/3 have been around for years now.

+1 on your initial comment. Exactly how I feel about the current situation.

MilkV Oasis with SG2380 would be the end-game for majority of developers, but they are definitely loosing money if they keep starting price at 120 USD. They don't have it frozen (they changed the SoC specification some weeks ago) thus I wouldn't be surprised to see this slip into 2025. I wouldn't be surprised if this outperforms MilkV Pioneer.

To my understanding SiFive continues to offer their selection of core IP. Anyways, I would assume any existing contract would have to be fulfilled for various legal reasons.

SG2042 itself is T-HEAD C920 design which is a mess, and might not be even called a RISC-V compliant design. We are kinda stuck it existing and being used in various chips. There are other design issues discovered IIRC (atomic might not work properly [at least on the kernel side workarounds required]; floating point failures in glibc testsuite because FP not being compliant). SG2044 is scheduled for the next year (2024). Not many details are known: 64 cores, 8 DDR controller, 3x memory bandwidth, vector v1.0 support, 2x PCIe (unknown what that means, Gen3 -> Gen4? More lanes?). The cores are unknown, but SG2038 is SiFive P670. T-HEAD has C908 that support vectors v1.0 (and solves some other issues), but that's a smaller core. Not a replacement for C910/C920.

It could be that decision to not support AVX512 was made very late in product development and thus early batches didn't have chicken bit disabled or/and fused it off.

There might be gazillions of reason why this was done.

Zba, Zbb, Zbc, Zbs (BitManip) have been approved by "Architecture Review" thus I assume they close to being ratified. Probably one of the first new extensions to be available for RISC-V.

Because it's not ratified the BitManip extensions are not listed in any RISC-V Profiles as supported (or required). Platforms specification is also not requiring it.

Note that the next Profiles will be for 2022, thus any extension ratified before that most likely will appear in a new profile (i.e. as supported, non-conflicting extension) in some set.

There are Profiles specs and Platforms specs, that will be regularly updated. This means software has a fixed target on which it can depend.

I am running RX 570 with PCIe + 6-pin connector for the power. These works out-of-the-box due to open source drivers. Older Nvidia cards work too, but you would need to go with older cards as you need Nouveau driver. I believe someone recently used AMD RX 6700XT, which is a bit insane.

The bottleneck here is SoC, not the GPU. With HW decoding on the GPU I can play 4K 60fps trailers on Unmatched just fine.

For the price point they are going it's plenty enough. That's also enough to boot Linux distributions in headless mode.

IIRC Allwinner has already sent some patches related to RISC-V to kernel and also suggestions to SBI specification. So far the beginning is good. Remember that they are using IP from Alibaba. Alibaba might as well work on upstreaming, etc. efforts for this (speculation).