artisanspam
Joined 6 years ago
Joined 6 years ago
But I know I, and everyone else posting in this thread, are in the minority. It's clear that most people prefer algorithmic drip in a walled garden. There's a reason everyone flocks to those platforms when RSS superseded them. I don't think I need to re-hash why those platforms are bad for the health of the internet and society as a whole.
So what can be done at a structural level to fight this? What can be done to incentivize people to leave these algorithmic drip feeds to reverse this trend?
There are a non-negligible number of my coworkers who don’t use the licensed LSP implementation and they write all their code in vim – or worse, gvim through a VNC. It’s very easy to tell that their code quality is worse.
My hack was to take a picture on my phone, have Apple's image recognition copy the string to my iCloud clipboard, and I'd paste it on my mac.
It's too easy to defeat the purpose of these things if you're even slightly driven.
But if you replace that term with something like "virtue" or "eudaimonia" and read from that perspective, there can sometimes be some truths to glean from his writing. Nothing really novel, but interesting to read nonetheless.
Alias: artisanspam
Interests: Philosophy pertaining to both political theory and how to live “the good life,” cycling, violin, piano, jazz, PC gaming, design of the built environment (city design, interior design, landscaping) and how it shapes you, meditation, Buddhism (from a secular perspective)
Language(s): English
Link to something you think is cool: Pertaining to built-environment design, I find this YouTube channel interesting: https://youtube.com/@nevertoosmall
Contact info: in bio.
This has been something I wish was available for ARM pseudocode. It’d be ideal to just generate an equivalent Python, SystemVerilog, etc. library from the ARM ARM instead of having to reimplement a subset of it yourself.
However, I do have some problems that you may want to consider pivoting to or adding in the future:
1. A wrapper that works with all of the tools that EDA vendors offer as a back-end. Basically, CMake for SystemVerilog where I can just run `make` and compile, elab, and sim run in order. Every company I've worked for has made their own wrapper program which essentially re-creates this process and I've had to relearn it several times. If you had this wrapper, then you could easily just use other CI/CD pipeline which calls this tool. Bonus points if you can integrate it with VUnit or SVUnit unit testing frameworks.
2. SystemVerilog code generation. Something smarter than just "I wrote a Python script that prints SystemVerilog code to a file based on some config file and then you run your build with the file the Python just printed."
I'm sure there are others that I am not thinking of. But overall, I don't find a lack of CI to be the problem. It's the lack of tools that a CI pipe uses that's the problem.
ETA: Also, was it intentional to launch right on the tail of DVCon? If so, clever planning.
I don't think this'd have the incentive that you're suggesting it would unless something else is done, such as increasing the tax overall.