Some hubris in this post. Claims ASIC resistant PoW is "Solved as far as we can", with Ethash being the near end-all of hashing.
Random-X is a significant step towards ASIC resistance, requiring near general purpose computation to perform efficiently (i.e. if you can build a better CPU than Intel/AMD/ARM, you've already won).
(Random-X requires code JITting, large CPU caches, compliant floating point, SIMD, hardware AES, as well as large amounts of system RAM, and other things.)
Innovation continues. If you stop having ideas, step aside.
Random-X is a significant step towards ASIC resistance, requiring near general purpose computation to perform efficiently (i.e. if you can build a better CPU than Intel/AMD/ARM, you've already won).
https://github.com/tevador/RandomX/blob/master/doc/design.md
(Random-X requires code JITting, large CPU caches, compliant floating point, SIMD, hardware AES, as well as large amounts of system RAM, and other things.)
Innovation continues. If you stop having ideas, step aside.