voxelghost
Joined 6 years ago
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Joined 6 years ago
Not sure what they do on the windows side.
transcribed by Tristram Brelstaff
revised Fri, 19 Nov 2010
And so seem to be the case with most of the other EWDs I looked at as well.looking up static values is quick and easy. When you need to lookup results from previous stages of pipeline rather than just feeding them forward, thats where I run into trouble. But I am a relatively fresh FPGA designer, so I am sure it can be done. And I probably need to level up my boards a bit too.
Speed (clocks speed) , is dependent on your design layout, and for any resonably advanced layout, it takes lots of knowledge to push the clockspeed beyond 200Mhz on 'consumer'/prosumer models. (Compare to a few GHz for GPU/CPU).
FPGA speed shine where they can pipeline massively parallel calculations through pipelines with minimal lookups.