radium3d
Joined 12 years ago
Joined 12 years ago
It is not yet the same as C++ or Python, for two reasons:
1) Ambiguity is still the default. Formal languages force you to resolve it up front.
English lets you paper over it until the model or the compiler (the human) notices.
2) The "compiler" (the LLM) is statistical and non-deterministic. Same prompt, different day, different bugs. A real language has a spec.
The practical move is to treat English as a high-level specification language, keep the generated artifacts inspectable, and "still know enough of the lower layers to notice when the translation went wrong."^1
[1] This is the key that is where humans can still be necessary, or at least another pass through the LLMs to decide on the best path, in the compiled code. Compilers for other languages do the same C -> Binary, etc.
A conventional compiler is bound by an as-if rule. It can take many internal routes, but the observable behavior has to match the language spec. Same source, same defined semantics. If two gcc runs emit different binaries, the program is still supposed to compute the same answers on the same inputs. That is why people treat the source as the artifact and the binary as disposable.
An LLM compiling English has no as-if rule unless you add one. "Sort the users by last active" can become a stable sort, an unstable sort, a SQL order by, an in-memory timsort, or a query that drops people with null timestamps. All of those can look like success. They are different programs. The model is not optimizing under a spec. It is filling in the parts you did not write.
A human who can read the destination language still notices when the chosen path is the wrong program.
A second model pass can compare paths, but only if you give it a way to score them: tests, types, invariant
So the historical analogy still holds, with one correction. JavaScript and Python were dismissed for being too easy, but they already had grammars and evaluators. English is easier still, and the evaluator is a statistical translator that will invent a dialect if you let it. The practical move stays the same: treat English as the spec language, pin the generated artifacts behind tests, and keep enough fluency in the lower layer to see when the translation chose a different program than the one you meant. The human is not required because the computer is weak. The human is required because the source language still leaves room for more than one destination.
Now we just code in english and the computer does the rest.
Hazard Lights: Yes, the vehicle will automatically turn on its hazard lights
Controlled Slowdown: The car gradually slows down to a complete stop within its current lane.
Horn & Unlock: Once fully stopped, the vehicle places itself in Park, unlocks the doors, and may sound the horn continuously to signal for help.
Currently, Autopilot and supervised FSD are classified as Level 2 Driver Assistance Systems. Regulatory frameworks (NHTSA in the US, UNECE internationally) mandate that:
1) No Autonomous Lane Changes During Failure: Level 2 systems are not permitted to execute pull-over maneuvers (changing across active lanes to reach a shoulder) without driver supervision or dedicated Level 3/4 autonomous certification.
2) Risk of Pulling Over Unsupervised: A car pulling off to the right shoulder unguided could potentially cross multiple lanes of traffic or steer into a blind spot/guardrail if the driver is incapacitated.
3) Default Safety State: Regulators require the vehicle to safely bring itself to a stop in the path it is currently tracking (the active lane) with hazards illuminated, rather than attempting an unmonitored multi-lane drift.
https://www.nhtsa.gov/interpretations/ncc-230607-001-571108-...
Memory makers are responding with a huge build-out. Building a fab shell and cleanroom takes years, which is why the crunch has lasted so long, but many of these projects are now well underway. New capacity is what ended past memory shortages. New factories going in:
SK hynix
M15X, Cheongju, Korea: first wafers early 2026 (reported), ramping through 2027 Yongin Y1, Korea: first cleanroom Feb 2027 (company target) Yongin Y2, Korea: groundbreaking planned July 2027, first cleanroom June 2029 Micron
ID1, Boise: first wafer output mid-2027 Tongluo, Taiwan: an existing PSMC cleanroom it bought for $1.8B, with meaningful shipments mid-2027 ID2, Boise: late 2028 Hiroshima, Japan: broke ground July 2026, with initial output late 2028 Clay, New York (up to 4 fabs, $100B): broke ground Jan 2026, with first output in 2030 Samsung
P5, Pyeongtaek: mass production 2028 (reported) Yongin national complex: site work began Oct 2026, with the first fab targeting Oct 2029 (reported; Samsung hasn't given a date) Nanya
Fab 5A, New Taipei: 10nm-class EUV DRAM, with wafer starts in 2H 2027 (reported) Tesla / SpaceX (Terafab)
Research fab at Giga Texas, Austin: broke ground April 2026. There's no official output date. Grimes County, Texas (logic, memory, packaging; Phase 1 over $16.8B): land clearing since Aug 2026. Texas filings say commercial operations in 2028, but SemiAnalysis estimates late 2029.
The first real supply relief is 2027, a second wave comes in 2028–29, and a lot of that new capacity is aimed at HBM and server memory, so consumer DDR5 and GDDR will likely ease last.
Sources: Micron FQ4 2026 call, the SK hynix newsroom, TrendForce, Texas JETI filings via ENR, and Tom's Hardware/SemiAnalysis.