nonadhocproblem
Joined 4 months ago
Joined 4 months ago
> receives pushback on the specific, objectively nonsensical critique
> "oh so you're saying that LLM computation and human cognition are equivalent? they're glorified calculators that disprove the Jacobian conjecture!!!"
Hilarious critique. If you weren't as mathematically illiterate as you likely are, you would know how general matrix operations are, and how essentially any algorithm (including human cognition) can be implemented using them as an intermediate.
codec decode ratio encode
misa77 -0 5302 MB/s 42.64% 58.7 MB/s
selkie -3 3078 MB/s 39.58% 97.0 MB/s
lzo1x -1 421 MB/s 47.48% 314 MB/s
memcpy 12135 MB/s 100.00% 11952 MB/smisa77 and oodle are both supported in turbobench (see: https://github.com/powturbo/turbobench), so it's easy to compare them.
Results on the silesia corpus on the same Intel setup described in the README, using turbobench:
codec decode ratio encode
misa77 -0 5309 MB/s 42.64% 58.2 MB/s
misa77 -1 4332 MB/s 39.65% 54.5 MB/s
selkie -1 3095 MB/s 43.48% 197 MB/s
selkie -2 3013 MB/s 41.80% 163 MB/s
selkie -3 3081 MB/s 39.58% 95.8 MB/s
selkie -4 3498 MB/s 36.95% 43.3 MB/s
selkie -5 2607 MB/s 33.58% 2.97 MB/s
lz4 2530 MB/s 47.60% 373 MB/s
Note: selkie -4 corresponds to the "Normal" level here.The format, however, might continue to change for some time because I want to push performance even further.
What is the advantage of this? Out-of-order execution (see my decoder's hot loop: https://github.com/welcome-to-the-sunny-side/misa77/blob/3a9...).
In particular, on even moderately compressible data most blocks take the following form:
- 1 token byte + 2 distance bytes
- a somewhat unpredictable number of literal bytes
If these streams are interleaved, then it's harder for the out-of-order core to process the token bytes of several blocks in advance (as the position of the next token byte depends on the unpredictable number of literal bytes in the current block). However, if you separate them (all token bytes in a prefix, and literal bytes in a suffix), the CPU can speculatively parse token bytes of a lot of blocks in advance (as most of the time, it just has to step forward by three bytes to go to the next block's token byte).I haven't implemented any ARM-specific dispatch yet (there are currently no NEON paths for vector ops either, and we instead trust the compiler to autovectorize), and will do so for upcoming versions.