mereel

Could you elaborate a bit more about the difference between Nx1 matrices and "true vectors"?

Right now I only see one positive comment in the whole thread, did you see more when you posted? I’m curious if some were deleted.

It reads like sarcasm to me

Definitely, some code is much more readable/clean in C++, while still compiling to reasonable VHDL. Also templates let you create fairly complex blocks programmatically at compile-time, Verilog doesn't have the same metaprogramming facilities that C++ offers.

Sadly you can't synthesize any old piece of C++, there are a ridiculous amount of constraints and you need to write the code in a very specific way.

Also there's not necessarily much of a performance gain, some tasks are not good candidates for being implemented in hardware (as a general rule you need a lot of parallelism to make it worth it). As an overly simple example, implementing hardware RSA and hoping for a significant speedup doesn't make sense because there isn't really much parallelism and it's usually only used to encrypt keys, but something like AES or SHA might benefit from a good hardware implementation because there is much more parallelism to be had and they are used to encrypt much larger amounts of data.

To add even more complexity, the compilers can be obscenely finicky with optimizations.

Hopefully the admins will edit it to be a little more informative and less clickbaity.

I thought they were saying they're going to stop selling the current standard one, and the new "standard" will be the software limited plus, and that it will only be available at a store and not online.