I'll also point out that we've always had better starting points for open source high performance cores. SPARC and POWER both have open ISAs and open-source cores with useful performance. The UltraSPARC T1 and T2 processors were open sourced under the OpenSPARC project. POWER has the OpenPOWER project governing the Power ISA, and IBM itself created Microwatt, Chiselwatt, and the A2I/A2O cores as open source that people can build their own PowerPC systems from.
OpenFirmware came out of OpenSPARC and is also used by POWER too. Parts of it are used in ARM and RISC-V today (mostly DeviceTree, though arguably quite badly).
Nobody actually wants to make good cores for cheap. Nobody wants to make compatible systems unless forced to. That's why ARM and RISC-V are fragmented messes.
OpenFirmware came out of OpenSPARC and is also used by POWER too. Parts of it are used in ARM and RISC-V today (mostly DeviceTree, though arguably quite badly).
Nobody actually wants to make good cores for cheap. Nobody wants to make compatible systems unless forced to. That's why ARM and RISC-V are fragmented messes.