I suspected that this was the case when they mentioned adding "one bit at a time" -- the CPU design that they implemented is Olof Kindgren's SERV [0], a tiny bit-serial risc-v CPU/soc (award-winning, of course).
From [1]:
> Olof Kindgren
> 5th April 2025 at 10:59 am
> It’s a great achievement, but I’m of course a little sad to see that it’s not mentioned anywhere that Wuji is just a renaming of my CPU, SERV. They even pasted in block diagrams from my documentation.
From [1]:
> Olof Kindgren
> 5th April 2025 at 10:59 am
> It’s a great achievement, but I’m of course a little sad to see that it’s not mentioned anywhere that Wuji is just a renaming of my CPU, SERV. They even pasted in block diagrams from my documentation.
[0] https://github.com/olofk/serv
[1] https://www.electronicsweekly.com/news/business/2d-32-bit-ri...