EDRAM was very different, and IBM still uses it today. It is DRAM that is on the same die as the cores, which makes it far slower than AMD's VCache (which is SRAM). The concept is the same - putting a huge amount of cache on chip - but it's a very different solution.
The Intel solution was also not 3D stacked. It's a little like having an HBM stack next to the chip as a cache.
The Intel solution was also not 3D stacked. It's a little like having an HBM stack next to the chip as a cache.