It's also sporting a much more advanced ARM core[1], Cortex-M7, compared to most of the other ARM boards which had Cortex-M0(+) cores.
The M7 supports cache unlike the M0(+), and the processor used[2] has 64kB of it, split evenly into instruction and data cache. It also supports branch speculation which the M0(+) does not.
While the Teensy has 4.5x the clock frequency of the Pico 1, the Teensy is 8x faster.
Main outlier is the Pico 2 with a Cortex-M33, though still at a reduced clockspeed compared to the Teensy. From what I can see[3] it does not have cache for its on-board memory, "just" branch speculation like the M7.
The M7 supports cache unlike the M0(+), and the processor used[2] has 64kB of it, split evenly into instruction and data cache. It also supports branch speculation which the M0(+) does not.
While the Teensy has 4.5x the clock frequency of the Pico 1, the Teensy is 8x faster.
Main outlier is the Pico 2 with a Cortex-M33, though still at a reduced clockspeed compared to the Teensy. From what I can see[3] it does not have cache for its on-board memory, "just" branch speculation like the M7.
[1]: https://en.wikipedia.org/wiki/ARM_Cortex-M
[2]: https://www.nxp.com/part/MIMXRT1062DVL6A
[3]: https://datasheets.raspberrypi.com/rp2350/rp2350-product-bri...