> 3) designing and implementing CISC is difficult and takes long time — that's true... but designing and implementing a highly performant RISC is also quite difficult and takes a long time, and today the difference is mainly in the decoding stage: after it, its all RISC-like microinstructions in either case;
You are massively understating this. Tenstorrent has ~280 people. They are working on 2-3 CPU designs, 2-3 AI accelerators, all the IO stuff, etc. A decent percentage of these people will have to be dedicated to testing, marketing, HR, finances, legal, etc. Jim Keller projects their 8-wide Ascalon to be competitive with the upcoming Zen5 core.
I'll guarantee you that the Zen 5 core has way more than 280 people working on it. Even if Ascalon were just 70% of the performance of Zen 5, that would put it around Zen 2 performance and that core also required hundreds to thousands of people.
This is an R&D economic disparity that cannot be sustained.
This isn't limited to Tenstorrent either, Nuvia had around 300 people when it was acquired and the Qualcomm Oryon also seems to be competitive with x86 for a fraction of the R&D cost.
You are massively understating this. Tenstorrent has ~280 people. They are working on 2-3 CPU designs, 2-3 AI accelerators, all the IO stuff, etc. A decent percentage of these people will have to be dedicated to testing, marketing, HR, finances, legal, etc. Jim Keller projects their 8-wide Ascalon to be competitive with the upcoming Zen5 core.
I'll guarantee you that the Zen 5 core has way more than 280 people working on it. Even if Ascalon were just 70% of the performance of Zen 5, that would put it around Zen 2 performance and that core also required hundreds to thousands of people.
This is an R&D economic disparity that cannot be sustained.
This isn't limited to Tenstorrent either, Nuvia had around 300 people when it was acquired and the Qualcomm Oryon also seems to be competitive with x86 for a fraction of the R&D cost.