It wasn't that long ago that I could package silicon with a little
quartz window.
Anyone who remembers old-skool EPROMS will know what I mean.
When doing my VLSI course at UCL in the 1980s we all had to make a
"chip". Mine was a 16 bit counter with ripple adder and accumulator.
And we had them fabbed (yes probably unbelievable in this day and age)
and had to test them on the lab bench!
BTW I'm not talking about FPGA here. We actually had a class visit to
the fab-plant and put on bunny suits to go into a level-3 clean area
and look at our UV masks in the projector room.
So, obviously to save money, all the class had a little bit of silicon
real-estate and some shared tristate registers that we could access
our design through with our own address space.
Now my point is; that when the chips were delivered we were all super
excited. We looked at our silicon through a high power bench
microscope. Everyone had signed their name (initials) in silicon next
to their plot on the die. I remember marvelling at the smallest
writing I had ever done in my life!
So, here's part of how you make semi-secure hardware.
Hardware you can actually look at using a simple lab microscope, no
need for x-rays etc.
Just sample randomly from the wafers and have those packaged in
quartz, while 99% of the rest are normally packaged in opaque
resin/ceramic. Make the randomly sampled wafers available for public
inspection.
Anyone who remembers old-skool EPROMS will know what I mean.
When doing my VLSI course at UCL in the 1980s we all had to make a "chip". Mine was a 16 bit counter with ripple adder and accumulator.
And we had them fabbed (yes probably unbelievable in this day and age) and had to test them on the lab bench!
BTW I'm not talking about FPGA here. We actually had a class visit to the fab-plant and put on bunny suits to go into a level-3 clean area and look at our UV masks in the projector room.
So, obviously to save money, all the class had a little bit of silicon real-estate and some shared tristate registers that we could access our design through with our own address space.
Now my point is; that when the chips were delivered we were all super excited. We looked at our silicon through a high power bench microscope. Everyone had signed their name (initials) in silicon next to their plot on the die. I remember marvelling at the smallest writing I had ever done in my life!
So, here's part of how you make semi-secure hardware.
Hardware you can actually look at using a simple lab microscope, no need for x-rays etc.
Just sample randomly from the wafers and have those packaged in quartz, while 99% of the rest are normally packaged in opaque resin/ceramic. Make the randomly sampled wafers available for public inspection.