"No FPGAs, no microcontrollers, just discrete logic"
Very hard to believe that. .. How? Is it a SUBLEQ-style Turing tarpit that uses a very high clock and simple hardware to run RISC-V "in software" at a slower clock? Do the discrete logic gates get woven into an ad-hoc FPGA?
Considering the breadboard CPUs I saw a few years ago, it just doesn't look like enough board space... I could be wrong.
Very hard to believe that. .. How? Is it a SUBLEQ-style Turing tarpit that uses a very high clock and simple hardware to run RISC-V "in software" at a slower clock? Do the discrete logic gates get woven into an ad-hoc FPGA?
Considering the breadboard CPUs I saw a few years ago, it just doesn't look like enough board space... I could be wrong.