Does Backside Power Delivery mean the silicon area of the chip will be placed upside down on the motherboard to ensure efficient heat dissipation? (Since the power source will be on the opposite side compared to current day silicon)
Relevant quote from TFA which somewhat answers the above question:
> Of note, because the carrier wafer is on the signal side of the chip, this means it presents another layer of material between the transistors and the cooler. Intel’s techniques to improve heat transfer take this into account, but for PC enthusiasts accustomed to transistors at the top of their chip, this is going to be a significant change.
P.s. in case you never heard of BPD technology, https://semiengineering.com/challenges-in-backside-power-del... is also informative (thanks @rektide for the Anand link!)
Edit:
Relevant quote from TFA which somewhat answers the above question:
> Of note, because the carrier wafer is on the signal side of the chip, this means it presents another layer of material between the transistors and the cooler. Intel’s techniques to improve heat transfer take this into account, but for PC enthusiasts accustomed to transistors at the top of their chip, this is going to be a significant change.
TL;DR: No.