I have a personal dislike of special purpose hardware. I didn't really realize how much I disliked the idea, until I woke up to GPUs and off-CPU processing and the complexity of dealing with this "thing" bolted onto the side of a beautiful ISA, to do "other things" -which of course is entirely normal, it's always been so, Bell and Howell discussed a wheel of life about the smarts to run a printer in mainframe days, winding up with the printer moving to its own dedicated CPU and being networked and then you repeat the wheel over the network controller.
I first met this with a floating-point systems co-processor on a Dec-10. It was highly problem specific, only a single DECUS tape FORTRAN compiler talked to it (IIRC) and you had this giant freezer sized box (it was lime green, unlike the blue DEC-10 livery) sat next to the CPU doing... mostly nothing. It was basically idle almost all the time. Occupying floorspace, consuming power, making the DEC-10 more complex to operate.
Same-same with 3DES processing cards, on-card ethernet TCP, you-name-it -these things absolutely do improve the world, but at a cost of complexity.
So the idea of designing optical interference/coherence/diffraction "engines" to bolt onto the side of a beautiful ISA, and winding up with something morally like a GPU which has to do complex TCAM like memory, wierd protocols on the bus, all to get what? some context specific speed up of .. text processing?
If this winds up down in the VLSI level on-chip, as an alternate compute element inside the ALU/ISA space, with its own bus path, and simply integrates more tightly into the ISA I'd be fine.
Perhaps thats where it's going.
I first met this with a floating-point systems co-processor on a Dec-10. It was highly problem specific, only a single DECUS tape FORTRAN compiler talked to it (IIRC) and you had this giant freezer sized box (it was lime green, unlike the blue DEC-10 livery) sat next to the CPU doing... mostly nothing. It was basically idle almost all the time. Occupying floorspace, consuming power, making the DEC-10 more complex to operate.
Same-same with 3DES processing cards, on-card ethernet TCP, you-name-it -these things absolutely do improve the world, but at a cost of complexity.
So the idea of designing optical interference/coherence/diffraction "engines" to bolt onto the side of a beautiful ISA, and winding up with something morally like a GPU which has to do complex TCAM like memory, wierd protocols on the bus, all to get what? some context specific speed up of .. text processing?
If this winds up down in the VLSI level on-chip, as an alternate compute element inside the ALU/ISA space, with its own bus path, and simply integrates more tightly into the ISA I'd be fine.
Perhaps thats where it's going.