> Um... wat? No CPU tries to decode 99 bytes of memory in a cycle
Actually, no x86 processor decodes 8 instructions in parallel. This is an example to illustrate how the number of possible offsets scales with 15 instruction lengths.
> So you decode 32 instructions starting at each byte you've fetched
No you don't do that, it's too power consuming.
> But the combinatorics you're citing seem ridiculous, I don't understand that at all.
What I'm trying to explain is that decoding 8 instructions in parallel in x86 is hardly possible, while decoding 8 instructions (or more) from a RISC archi per cycle is never a problem
Actually, no x86 processor decodes 8 instructions in parallel. This is an example to illustrate how the number of possible offsets scales with 15 instruction lengths.
> So you decode 32 instructions starting at each byte you've fetched
No you don't do that, it's too power consuming.
> But the combinatorics you're citing seem ridiculous, I don't understand that at all.
What I'm trying to explain is that decoding 8 instructions in parallel in x86 is hardly possible, while decoding 8 instructions (or more) from a RISC archi per cycle is never a problem