The ISA has relatively little to do with it. Sure, x86 requires power-hungry decoders, but most of the time you'll be running from the uop cache anyway. Plus you get denser code. Arm and x86 aren't all that different under the hood these days and generally RISC vs CISC is a wash. It took heroic engineering to get x86 that fast, but that work is already done.
The ISA has relatively little to do with it. Sure, x86 requires power-hungry decoders, but most of the time you'll be running from the uop cache anyway. Plus you get denser code. Arm and x86 aren't all that different under the hood these days and generally RISC vs CISC is a wash. It took heroic engineering to get x86 that fast, but that work is already done.