Comment by drran

If we use third state as "spacer", then we will be able to use every single line connection as serial connection, thus massively parallel, clock-less logic will be possible.

Instead of clocked design:

  data0: 000001111111111111111111111111111000000000
  data1: 000000000000000000000000000000000000000000
  data2: 000111111111111111111111111111100000000000
  ...
  clock: 000000000001111111111100000000000000000000

We will be able to use clockless design:

  data0: --111---
  data1: ---000--
  data2: ----111-

Or even:

  data: --111---000---111---

(1 represents high signal, 0 - low signal, - - neutral signal).