This is one of the reasons I jumped ship from writing VHDL for Xilinx parts and am now a Java dev. It’s worth noting that Altera, the other major FPGA vendor, is not noticeably better in this regard (or at least they weren’t when I last used their stuff ~5 years ago).
(The other reason is that I am unbelievably bad at getting the damn thing to meet timing.)
(The other reason is that I am unbelievably bad at getting the damn thing to meet timing.)