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Comment by nsajko

Presumably you mean that false should be represented with 0 and true with ~0? And the motivation is maybe to be able to toggle boolean values with one instruction?

Has there been any discussion on this matter on risc-v mailing lists or somewhere? If the RISC-V Base ISA is now ratified, I think it is too late to change such things.

Edit: seems to be too late. According to [0], SLTx instructions "set the destination register to one or zero depending on whether the relation is true or not."

[0] https://www.imperialviolet.org/2016/12/31/riscv.html

parent nsajko 7 years ago

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