Is EE actually the correct field to study for formal verification? I have been looking into this at one point and it seemed very much within the realm of computer scientists.
For instance, our EE study program does not include even basic computability theory, the formal logic/graph theory was pretty minimal and besides some K-maps also zero boolean function theory.
This compared with the CS program that contains multiple very in-depth courses exactly on those topics which seem pretty critical for formal verification of hardware.
For instance, our EE study program does not include even basic computability theory, the formal logic/graph theory was pretty minimal and besides some K-maps also zero boolean function theory.
This compared with the CS program that contains multiple very in-depth courses exactly on those topics which seem pretty critical for formal verification of hardware.