Using Tensorflow to generate Verilog to run Tensorflow? That’s s flywheel that could destroy the universe.
In all seriousness, this is cool. Are there any writeups about the state of ASICs for ML? I understand Google TPUs to be the same thing but I have no clue what’s going on under the hood.
In all seriousness, this is cool. Are there any writeups about the state of ASICs for ML? I understand Google TPUs to be the same thing but I have no clue what’s going on under the hood.