Comment by jgrahamc

Two things I try to get people to do with Makefiles:

1. Use the := syntax

:= means that a variable is immediately expanded; = means it's delayed until the variable is used which on a large Makefile has a speed penalty. If you know that a variable is fully defined (i.e. all the $(...) references in its value are fixed) when the variable is being defined then use :=. That's the case here where the Makefile starts:

    GOCMD=go
    GOBUILD=$(GOCMD) build
    GOCLEAN=$(GOCMD) clean
    GOTEST=$(GOCMD) test
    GOGET=$(GOCMD) get
    BINARY_NAME=mybinary
    BINARY_UNIX=$(BINARY_NAME)_unix

which can be written

    GOCMD   := go
    GOBUILD := $(GOCMD) build
    GOCLEAN := $(GOCMD) clean
    GOTEST  := $(GOCMD) test
    GOGET   := $(GOCMD) get

    BINARY_NAME := mybinary
    BINARY_UNIX := $(BINARY_NAME)_unix

2. If you have a one line recipe then use the target: preq ; command syntax to avoid tabs. For example,

    build: 
        $(GOBUILD) -o $(BINARY_NAME) -v

is the same as

    build: ; $(GOBUILD) -o $(BINARY_NAME) -v