Targeting FPGAs is something we've been keeping our eye on as well. Most of the pieces are in place. I think the last non-trivial part is removing any malloc()/free() calls. This should be possible as the size and lifetime of memory allocations are known at compile time and can be either moved to the stack or made global as desired.
One of the reasons I opted against Halide myself was the feeling that for this domain there ought to be enough information available to the compiler to intelligently pick tiling and vectorization parameters. For example, using Polly [0]. However in practice, manual tiling and vectorization is hard to beat.
One of the reasons I opted against Halide myself was the feeling that for this domain there ought to be enough information available to the compiler to intelligently pick tiling and vectorization parameters. For example, using Polly [0]. However in practice, manual tiling and vectorization is hard to beat.
[0] http://polly.llvm.org/